CORBA Communications Implemented Directly in Hardware

ORBexpress FPGA Features

* High-performance, small footprint.
* CORBA communications in hardware without CORBA expertise.
* Design, simulate and implement CORBA into FPGAs with your existing tools and methodology.
* Full support for dynamic partial reconfiguration.
* Reduces costs - use an off-the-shelf standards-based hardware abstraction layer.
* Easy integration and interoperability of FPGAs, GPPs and DSPs in a single layer.

ORBexpress® FPGA is a lightweight hardware implementation of CORBA targeted for FPGAs. It supports standards-based CORBA operations and all data types. All CORBA message processing is performed directly in FPGA hardware; no GPP is required and the FPGA is not limited to co-processor models of operation.

Because ORBexpress FPGA maintains true location transparency, application functionality can migrate to or from an FPGA at any point in the design cycle. For example, the application can be initially prototyped on a workstation and, over time, application objects can be migrated to the FPGA as the hardware design matures. The top-level CORBA application can remain unchanged throughout the process.

* High-Performance, Small Footprint — ORBexpress FPGA meets timing for aggressive FPGA clock rates and processes CORBA messages with sub-microsecond latency. The instantiated FPGA hardware is compact and occupies only a small fraction of the available LUTs (Look-Up Tables).

* Full Support for Dynamic Partial Reconfiguration — ORBexpress FPGA is designed from the ground up to fully support dynamic partial reconfiguration. Lightweight VHDL (VHSIC Hardware Description Language) wrappers generated by the ORBexpress IDL compiler allow CORBA-enabled FPGA application blocks to dynamically disconnect from the ORB and reconnect after reconfiguration is complete. This occurs without interfering with ORB operations or other FPGA logic.

* Design, Simulate and Implement CORBA Communications into FPGAs with Your Existing Tools and Methodology — ORBexpress FPGA works with your existing FPGA design & verification tools and your existing design methodology - no new tools or tool frameworks are required. All ORBexpress FPGA implementation files are provided as VHDL source and synthesized netlist. RTL-level simulation libraries are provided for all netlist-based modules to support fast, efficient simulation.

* Enables CORBA Communications in Hardware without Requiring CORBA Expertise — Deploying the ORBexpress FPGA ORB and creating CORBA-enabled FPGA applications does not require special CORBA expertise. The ORB cores and IDL compiler handle the details of CORBA communications and provide a simple, well-documented interface to the FPGA designer.

* Low Adoption Costs -— ORBexpress FPGA isolates the software programmer from the details of FPGA design and the FPGA designer from the details of CORBA and object oriented programming. Thus cross-discipline training is minimal. Additionally, ORBexpress FPGA provides a re-usable standards-based Hardware Abstraction Layer; eliminating the need to develop communication protocols for every project. Engineering resources can focus on the details of the application.

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